●B.E in Electronics and Communication Engineering
●M.Tech in VLSI design and embedded system

●Teaching experience : 3 years 7 months

● FPGA Based Implementation of Flat Panel Display Controller with DVI Interface." International Journal of Engineering Research and Technology. Vol. 2. No. 4 (April-2013). ESRSA Publications, 2013.
● DESIGN OF SYSTOLIC BASED OPTIMIZATION TOOL FOR FIR FILTERS USING BINARY TOUR METHOD” International Journal of VLSI and Embedded Systems-IJVES ISSN: 2249 – 6556 Vol 04, Issue 03; May -June 2013
● Automated medication dispensing system." 2014 Eleventh International Conference on Wireless and Optical Communications Networks (WOCN). , IEEE Digital explore IEEE ISSN: 2151-7703 K L University, Vijayawada, AP 11th -13th September,2014
● Design of Systolic Based Optimization Tool for FIR Filters Using Binary Tour Method." Programmable Device Circuits and Systems 5.7 (2013): 321-326.
● Mobile agent computing “presented at International conference on Standards for Engineering and Management, conducted on 15th May 2016 held at Coimbatore.
● Securing the Wireless Sensor Network Communication” International Journal of advanced Research in Computer Engineering & Technology (IJARCET) Volume 5 Issue 3, March 2016.

● ISO Coordinator
● Internship and Training Coordinator
● BSNL-RTTC Nodal Officer
● VLSI Training Coordinator and Training on VLSI Physical Design
● WEBSITE Coordinator

● International Society for Research and Development (ISRD)
● International Association of Engineers (IAENG)

● Trained a 6 students on VLSI domain using cadence tool and they got placed in “Sankalp Semiconductors”
● Appointed as an REVIEWER in Research script / IJMTES Group of Journals (IJRE | IJREE | IJRCS | IJRME | IJMH | IJMTES)